DataScalar Race

Memory is split across chips. A traditional machine runs the program once and fetches remote data with a request and a response. DataScalar runs the same program on every chip: whichever chip owns the data reads it and broadcasts it one way, so nobody asks. The extra compute is wasted on purpose, which pays off if moving data costs more than arithmetic. Based on Burger, Kaxiras & Goodman, DataScalar Architectures (ISCA ’97 / JSA ’99).

Speed

Traditional chip 0 runs the program · remote load = request → read → response

DataScalar every chip runs the program · owner reads and broadcasts

arithmetic local memory read stalled, waiting for data request / response broadcast

Chips Access pattern Arithmetic ops per load Chip-to-chip latency (cycles) Interconnect Energy to move a word ÷ energy of one op

When does wasting compute pay off? DataScalar energy ÷ traditional energy, across costs of moving data

Toy model: in-order chips, one word per load, memory split into contiguous slices, one cycle per arithmetic op, no caches. Time is always in DataScalar's favour here because replicated compute runs in parallel. The real cost is energy: every chip executes every instruction. The bottom chart shows where that waste is cheaper than the traffic it removes.